High-speed architecture of the CABAC probability modeling for H. 265/HEVC encoders

G Pastuszak - 2016 International Conference on Signals and …, 2016 - ieeexplore.ieee.org
In hardware video encoders, the throughput of the entropy coding stage can limit the support
of high-quality and high-resolution videos. This paper presents an FPGA-oriented …

Multisymbol architecture of the entropy coder for H. 265/HEVC video encoders

G Pastuszak - IEEE Transactions on Very Large Scale …, 2020 - ieeexplore.ieee.org
In video compression, throughputs of entropy encoders based on arithmetic coding are
limited. This article presents the architecture of the entropy coder able to process in each …

A 4k capable FPGA based high throughput binary arithmetic decoder for H. 265/MPEG-HEVC

J Hahlbeck, B Stabernack - 2014 IEEE Fourth International …, 2014 - ieeexplore.ieee.org
High Efficiency Video Coding (HEVC) is the newest video coding standard approved by the
ISO/IEC and ITU-T in January 2013. By providing a video coding efficiency gain of up to 50 …

Low-power hardware design for the HEVC binary arithmetic encoder targeting 8K videos

FLL Ramos, J Goebel, B Zatt, M Porto… - 2016 29th Symposium …, 2016 - ieeexplore.ieee.org
The HEVC (High Efficiency Video Coding) has risen as the state-of-the-art video coding
standard, targeting the processing of high quality video. As one of its main components, the …

High-throughput Binary Arithmetic Encoder architecture for CABAC in H. 265/HEVC

C Chen, K Liu, S Chen - … on Solid-State and Integrated Circuit …, 2016 - ieeexplore.ieee.org
Context adaptive binary arithmetic coding (CABAC) is the entropy coding tool applied in the
latest video coding standard, High Efficiency Video Coding (H. 265/HEVC). CABAC …

A hardware CABAC encoder for HEVC

B Peng, D Ding, X Zhu, L Yu - 2013 IEEE International …, 2013 - ieeexplore.ieee.org
This paper presents a hardware design of context-based adaptive binary arithmetic coding
(CABAC) for the emerging High efficiency video coding (HEVC) standard. While aiming at …

A variable-clock-cycle-path VLSI design of binary arithmetic decoder for H. 265/HEVC

J Zhou, D Zhou, S Zhang, S Kimura… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
The next-generation 8K ultra-high-definition video format involves an extremely high bit rate,
which imposes a high throughput requirement on the entropy decoder component of a video …

High-throughput binary arithmetic encoder using multiple-bypass bins processing for HEVC CABAC

FLL Ramos, B Zatt, M Porto… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
The advance of massive video processing applications, devices and resolutions has led to
new challenges in video encoding. The HEVC (High Efficiency Video Coding) standard …

Hardware and Software Implementation of H. 256 CABAC Encoder/Decoder

M Wahiba, S Abdellah, B Aichouche… - … Conference on Smart …, 2018 - ieeexplore.ieee.org
Video compression is an essential operation in Ultra High Definition (UHD) real time
applications. Several techniques for video compression exist nowadays, but the H. 265 …

Efficient Binary Arithmetic Encoder for HEVC with multiple bypass bin processing

QL Nguyen, DL Tran, DH Bui, DT Mai… - 2017 7th International …, 2017 - ieeexplore.ieee.org
The increasing amount of digital video with supreme quality requires more efficient
compression. As the complexity of video coding algorithm is rising, there are more demands …